Currently standard LED packages offer limited integration and functionality of light source systems and do not extensively integrate passive and/or active components at the package level. One reason for this is that system cost increases considerably and devices integrated with the LEDs suffer from large thermal cross-talk that reduces device reliability. The high cost of integration is, in part, attributable to complicated package structure and reliance on relatively expensive package substrates.
FIG. 1 illustrates a conventional LED package structure as formed by a conventional packaging method 100. LEDs 105 are disposed on a silicon substrate 110. The silicon substrate is typically a wafer of the type employed in integrated circuit manufacture. As such, the substrate area is limited to the state of the art in IC manufacture, which is currently 300 mm diameter wafers. While 450 mm diameter wafers are in development, no further increases in silicon wafer size are expected in the coming decades due to prohibitively high tooling costs. With the area of the substrate 110 so limited, many substrates are required to manufacture high volumes the conventional LED package structure. Also, to fabricate a matrix or array of LED devices into a form factor that is larger than a conventional silicon wafer, such as for a large panel display screen, or high lux light source, wafer substrates must first be cut into squares or completely singulated and then re-assembled with like units into a large matrix.
As shown in FIG. 1, the packaging method 100 entails forming a cavity 115 in the silicon substrate (e.g., by a KOH etch) and depositing a metal film 120 in the cavity. Through substrate vias (TSuVs) 125 are then formed and the LED chips 105 are mounted with a chip to wafer (C2W) bonding process. A silicone encapsulant 130 fills in the cavity 115 and a lens wafer 135 is bonded with a wafer-to-wafer (W2W) bonding process. Singulation is then performed to arrive at packaged LED structures.
An LED package structure that enables larger form factors with reduced assembly, enables less costly package-level integration with active and/or passive components, offers improved thermal management, and all at a reduced cost is therefore of significant technical and commercial advantage.